Danh sách loạt 4000
bài viết danh sách Wikimedia
Họ 4000 hay 4000 series là họ mạch tích hợp chuẩn công nghiệp (IC) thực hiện một loạt các chức năng logic sử dụng công nghệ Complementary Metal-Oxide-Semiconductor (CMOS), và ngày nay vẫn đang được sử dụng.[1]
Danh sách IC
sửaMã hiệu | Số PT | Mô tả | Datasheet |
---|---|---|---|
4000 | 2 | Dual 3-input NOR gate + 1 inverter | [1] |
4001 | 4 | Quad 2-input NOR gate | [2] |
4002 | 2 | Dual 4-input NOR gate | [3] |
4006 | 1 | 18-stage shift register | [4] |
4007 | 2 | Dual complementary pair + 1 inverter | [5] |
4008 | 1 | 4-bit binary full adder | [6] |
4009 | 6 | Hex inverting buffer (replaced by 4049) | [7] |
4010 | 6 | Hex non-inverting buffer (replaced by 4050) | [8] |
4011 | 4 | Quad 2-input NAND gate | [9] |
4012 | 2 | Dual 4-input NAND gate | [10] |
4013 | 2 | Dual D-type flip-flop | [11] |
4014 | 1 | 8-stage shift register | [12] |
4015 | 2 | Dual 4-stage shift register | [13] |
4016 | 4 | Quad bilateral switch | [14] |
4017 | 1 | Decade counter with 10 decoded outputs (5-stage Johnson counter) | [15] |
4018 | 1 | Presettable divide-by-N counter | [16] |
4019 | 4 | Quad AND/OR select gate | [17] |
4020 | 1 | 14-stage binary ripple counter | [18] |
4021 | 1 | 8-stage shift register | [19] |
4022 | 1 | Octal counter with 8 decoded outputs (4-stage Johnson counter) | [20] |
4023 | 3 | Triple 3-input NAND gate | [21] |
4024 | 1 | 7-stage binary ripple counter | [22] |
4025 | 3 | Triple 3-input NOR gate | [23] |
4026 | 1 | Decade counter with decoded 7-segment display outputs and display enable | [24] |
4027 | 2 | Dual J-K master-slave flip-flop | [25] |
4028 | 1 | BCD to decimal (1-of-10) decoder | [26] |
4029 | 1 | Presettable up/down counter, binary or BCD-decade | [27] |
4030 | 4 | Quad XOR gate (replaced by 4070) | [28] |
4031 | 1 | 64-stage shift register | [29] |
4032 | 3 | Triple serial adder | [30] |
4033 | 1 | Decade counter with decoded 7-segment display outputs and ripple blanking | [31] |
4034 | 1 | 8-stage bidirectional parallel/serial input/output register | [32] |
4035 | 1 | 4-stage parallel-in/parallel-out shift register | [33] |
4038 | 3 | Triple serial adder | [34] |
4040 | 1 | 12-stage binary ripple counter | [35] |
4041 | 4 | Quad true/complement buffer | [36] |
4042 | 4 | Quad D-type latch | [37] |
4043 | 4 | Quad NOR R/S latch with tri-state outputs | [38] |
4044 | 4 | Quad NAND R/S latch with tri-state outputs | [39] |
4045 | 1 | 21-stage counter | [40] |
4046 | 1 | Phase-locked loop with VCO | [41] |
4047 | 1 | Monostable/astable multivibrator | [42] |
4048 | 1 | Multifunctional expandable 8-input gate with tri-state output | [43] |
4049 | 6 | Hex inverter | [44] |
4050 | 6 | Hex buffer/converter (non-inverting) | [45] |
4051 | 1 | 8-channel analog multiplexer/demultiplexer | [46] |
4052 | 2 | Dual 4-channel analog multiplexer/demultiplexer | [47] |
4053 | 3 | Triple 2-channel analog multiplexer/demultiplexer | [48] |
4054 | 1 | 4-segment LCD driver | [49] |
4055 | 1 | BCD to 7-segment decoder/LCD driver with "display-frequency" output | [50] |
4056 | 1 | BCD to 7-segment decoder/LCD driver with strobed-latch function | [51] |
4059 | 1 | Programmable divide-by-N counter | [52] |
4060 | 1 | 14-stage binary ripple counter and oscillator | [53] |
4062 | ? | Logic dual 3 majority gate | ? |
4063 | 1 | 4-bit digital comparator | [54] |
4066 | 4 | Quad analog switch (low "ON" resistance) | [55] |
4067 | 1 | 16-channel analog multiplexer/demultiplexer (1-of-16 switch) | [56] |
4068 | 1 | 8-input NAND gate | [57] |
4069 | 6 | Hex inverter | [58] |
4070 | 4 | Quad 2-input XOR gate | [59] |
4071 | 4 | Quad 2-input OR gate | [60] |
4072 | 2 | Dual 4-input OR gate | [61] |
4073 | 3 | Triple 3-input AND gate | [62] |
4075 | 3 | Triple 3-input OR gate | [63] |
4076 | 4 | Quad D-type register with tri-state outputs | [64] |
4077 | 4 | Quad 2-input XNOR gate | [65] |
4078 | 1 | 8-input NOR/OR gate | [66] |
4081 | 4 | Quad 2-input AND gate | [67] |
4082 | 2 | Dual 4-input AND gate | [68] |
4085 | 2 | Dual 2-wide, 2-input AND/OR invert (AOI) | [69] |
4086 | ? | Expandable 4-wide, 2-input AND/OR invert (AOI) | [70] |
4089 | 1 | Binary rate multiplier | [71] |
4093 | 4 | Quad 2-input Schmitt trigger NAND gate | [72] |
4094 | 1 | 8-stage shift-and-store bus | [73] |
4095 | 1 | Gated J-K flip-flop (non-inverting) | [74] |
4096 | 1 | Gated J-K flip-flop (inverting and non-inverting) | [75] |
4097 | 1 | Differential 8-channel analog multiplexer/demultiplexer | [76] |
4098 | 2 | Dual one-shot monostable | [77] |
4099 | 1 | 8-bit addressable latch | [78] |
4104 | 4 | Quad low-to-high voltage translator with tri-state outputs | [79] |
4106 | 6 | Hex Schmitt trigger | |
4160 | 1 | Decade counter with asynchronous clear | |
4161 | 1 | 4-bit binary counter with asynchronous clear | |
4162 | 1 | Decade counter with synchronous clear | |
4163 | 1 | 4-bit binary counter with synchronous clear | |
4175 | 4 | Quad D-type flip-flop | |
4192 | 1 | Presettable up-down counter | |
4500 | 1 | Industrial control unit | |
4502 | 6 | Hex inverting buffer (tri-state) | [80] |
4503 | 6 | Hex non-inverting buffer with tri-state outputs | [81] |
4504 | 6 | Hex voltage level shifter for TTL-to-CMOS or CMOS-to-CMOS operation | [82] |
4505 | 1 | 64-bit, 1-bit per word random access memory (RAM) | |
4508 | 2 | Dual 4-bit latch with tri-state outputs | [83] |
4510 | 1 | Presettable 4-bit BCD up/down counter | [84] |
4511 | 1 | BCD to 7-segment latch/decoder/driver | [85] |
4512 | 1 | 8-input multiplexer (data selector) with tri-state output | [86] |
4513 | 1 | BCD to 7-segment latch/decoder/driver (4511 plus ripple blanking) | |
4514 | 1 | 1-of-16 decoder/demultiplexer active HIGH output | [87] |
4515 | 1 | 1-of-16 decoder/demultiplexer active LOW output | [88] |
4516 | 1 | Presettable 4-bit binary up/down counter | |
4517 | 2 | Dual 64-stage shift register | |
4518 | 2 | Dual BCD up counter | [89] |
4519 | 4 | Quad 2-input multiplexer (data selector) | [90] |
4520 | 2 | Dual 4-bit binary up counter | [91] |
4521 | 1 | 24-stage frequency divider | |
4522 | 1 | Programmable BCD divide-by-N counter | |
4526 | 1 | Programmable 4-bit binary down counter | |
4527 | 1 | BCD rate multiplier | [92] |
4528 | 2 | Dual retriggerable monostable multivibrator with reset | [93] |
4529 | 2 | Dual 4-channel analog data selector/multiplexer | [94] Lưu trữ 2014-10-24 tại Wayback Machine |
4530 | 2 | Dual 5-input majority logical gate | |
4531 | 1 | 12-bit parity tree | |
4532 | 1 | 8-bit priority encoder | [95] |
4536 | 1 | Programmable timer | [96] |
4538 | 2 | Dual retriggerable precision monostable multivibrator | [97] |
4539 | 2 | Dual 4-input multiplexer | [98] |
4541 | 1 | Programmable timer | [99] |
4543 | 1 | BCD to 7-segment latch/decoder/driver with phase input | [100] |
4551 | 4 | Quad 2-channel analog multiplexer/demultiplexer | |
4553 | 1 | 3-digit BCD counter | [101] |
4555 | 2 | Dual 1-of-4 decoder/demultiplexer active HIGH output | [102] |
4556 | 2 | Dual 1-of-4 decoder/demultiplexer active LOW output | [103] |
4557 | 1 | 1-to-64 bit variable length shift register | [104] |
4558 | 1 | BCD to 7-segment decoder (enable, RBI and provides active–high output) | |
4560 | 1 | NBCD adder | [105] |
4562 | 1 | 128–bit static shift register | |
4566 | 1 | Industrial time-base generator | [106] |
4569 | 1 | Programmable divide-By-N, dual 4-Bit binary/BCD down counter | |
4572 | 6 | Hex gate: quad NOT, single NAND, single NOR | [107] |
4583 | 2 | Dual Schmitt trigger | |
4584 | 6 | Hex inverting Schmitt trigger | [108] |
4585 | 1 | 4-bit digital comparator | [109] |
4724 | 1 | 8-bit addressable latch | |
4750 | 1 | Frequency synthesizer | [110] |
4751 | 1 | Universal divider | |
4794 | 1 | 8-stage shift-and-store register LED driver | |
4894 | 1 | 12-stage shift-and-store register LED driver | |
4938 | 2 | Dual retriggerable precision monostable multivibrator with reset | |
4952 | 1 | 8-channel analog multiplexer/demultiplexer | |
40098 | 6 | Hex 3-state inverting buffer | |
40100 | 1 | 32-bit left/right shift register | [111] |
40101 | 1 | 9-bit parity generator/checker | |
40102 |
1 |
Presettable 2-decade BCD down counter | |
40103 | 1 | Presettable 8-bit binary down counter | |
40104 | 1 | 4-bit bidirectional parallel-in/parallel-out shift register (tri-state) | |
40105 | 1 | 4-bit x 16 word FIFO register | [112] |
40106 | 6 | Hex inverting Schmitt trigger-(NOT gates) | [113] |
40107 | 2 | Dual 2-input NAND buffer/driver | |
40108 | 1 | 4x4-bit (tri-state) synchronous triple-port register file | |
40109 | 4 | Quad level shifter | [114] |
40110 | 1 | Up/down counter latch decoder driver | |
40116 | 1 | 8-bit bidirectional CMOS-to-TTL level converter | |
40117 | 1 | Programmable dual 4-bit terminator | |
40147 | 1 | 10-line to 4-line (BCD) priority encoder | [115] |
40160 | 1 | Decade counter/asynchronous clear | |
40161 | 1 | Binary counter/asynchronous clear | |
40162 | 1 | 4-bit synchronous decade counter with load, reset, and ripple carry output | |
40163 | 1 | 4-bit synchronous binary counter with load, reset, and ripple carry output | |
40174 | 6 | Hex D-type flip-flop | |
40175 | 4 | Quad D-type flip-flop | |
40181 | 1 | 4-bit 16-function arithmetic logic unit | |
40192 | 1 | Presettable 4-bit up/down BCD counter | [116] |
40193 | 1 | Presettable 4-bit up/down binary counter | [117] |
40194 | 1 | 4-bit bidirectional universal shift register | [118] |
40195 | 1 | 4-bit universal shift register | |
40208 | 1 | 4 x 4-bit (tri-state) synchronous triple-port register file | |
40240 | 1 | Buffer/Line driver; inverting (tri-state) | |
40244 | 1 | Buffer/line driver; non-inverting (tri-state) | |
40245 | 1 | Octal bus transceiver; (tri-state) outputs | |
40257 | 4 | Quad 2-line to 1-line data selector/multiplexer (tri-state) | |
40373 | 1 | Octal D-type transparent latch (tri-state) | [119] |
40374 | 1 | Octal D-type flip-flop; positive-edge trigger (tri-state) | [120] |
45106 | 1 | frequency synthesizers |
Tham khảo
sửa- ^ Introduction to Digital Logic Gates. Electronics Tutorials, 2014. Truy cập 01 Apr 2015.
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